Power electronics technology has rapidly developed during the past decades. Power electronics systems aim to achieve high efficiency as power conversion interfaces while fulfilling the performance and reliability requirements. The key to achieving these objectives is power semiconductors, which dictate the power electronics system's efficiency, power density, and reliability. In recent years, traditional Silicon (Si) devices are reaching their material limits. Meanwhile, new Wide-Bandgap (WBG) devices such as Silicon Carbide (SiC) and Gallium Nitride (GaN) devices have been commercialized, featuring high breakdown voltage, fast switching speed, and high thermal capability. On the other hand, semiconductor devices are typically exposed to repetitive heat pulses and are often the most critical components affecting system reliability. Consequently, a comprehensive modelling method for modern power semiconductors that can describe various devices’ switching behaviors is highly desirable by power electronics engineers and manufacturers. This research focuses on developing a simulation-based modelling methodology for modern power semiconductors to evaluate the power electronics system’s efficiency. A multi-level simulation strategy has been proposed and implemented in PSCAD/EMTDC. A generalized transient semiconductor model has been developed, which can reproduce the device’s switching behaviors. Subsequently, the power losses are obtained to form a multi-dimensional power loss look-up table under a wide range of operating conditions. A dynamic thermal model for temperature estimation, and a typical electrical network using simple switch models for semiconductor devices have been implemented. The junction temperature is updated every switching cycle by the power loss with a thermal model and influence back to the electrical simulation. In this way, a closed-loop electro-thermal simulation is formed to evaluate both electrical and thermal performances in a single simulator with a range of acceptable accuracy. A double pulse test platform has been designed and built for device characterizations and power loss verifications. Moreover, a single-phase grid-tied buck-boost type inverter application has been selected as a case study and built to study the proposed method. The measured results indicate that the proposed approach is highly promising for power electronics engineers to evaluate and optimize a system during the early design stage.