Design and implementation of an automated testbed for evaluating switching behavior of power semiconductors

dc.contributor.authorGhosh, Avishek
dc.contributor.examiningcommitteeKordi, Behzad (Electrical and Computer Engineering), Zhu, Guozhen (Mechanical Engineering)en_US
dc.contributor.supervisorHo, Carl (Electrical and Computer Engineering)en_US
dc.date.accessioned2019-05-16T20:19:25Z
dc.date.available2019-05-16T20:19:25Z
dc.date.issued2019-04-04en_US
dc.date.submitted2019-04-04T19:40:35Zen
dc.degree.disciplineElectrical and Computer Engineeringen_US
dc.degree.levelMaster of Science (M.Sc.)en_US
dc.description.abstractA Double Pulse Tester (DPT) is a widely used setup for evaluating the switching behavior of power semiconductor devices. The results obtained from double pulse tests provide significant insight into the dynamic behavior of a device under test (DUT) such as its switching losses, switching speed (di/dt, dv/dt), turn-on and turn-off times etc. However, it is a tedious process to perform these tests under different permutations of test parameters and thereafter analyze the experimental data manually. This work presents a newly developed automated DPT prototype, which can run the tests one after another once the test conditions are entered in a Graphic User Interface (GUI). The test-control system also records the switching waveforms, test data, and systematically processes them to generate usable characterization results. The automatic, low cost, compact, modular and user-friendly design allows the proposed testing and measurement system to stand out from the conventional DPT setups. The design principles are experimentally verified by implementing a DPT prototype capable of testing power semiconductor devices up to 1000V, 60A, 250°C.en_US
dc.description.noteMay 2019en_US
dc.identifier.urihttp://hdl.handle.net/1993/33905
dc.language.isoengen_US
dc.rightsopen accessen_US
dc.subjectPower semiconductor device, Switching characterization, Double pulse testen_US
dc.titleDesign and implementation of an automated testbed for evaluating switching behavior of power semiconductorsen_US
dc.typemaster thesisen_US
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