Small signal model of an HVDC terminal for stability analysis of AC-DC power systems

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dc.contributor.authorShah, Masood Hussain.en_US
dc.date.accessioned2013-06-06T19:40:03Z
dc.date.available2013-06-06T19:40:03Z
dc.date.issued2009en_US
dc.degree.disciplineElectrical and Computer Engineeringen_US
dc.degree.levelMaster of Science (M.Sc.)en_US
dc.description.abstracten_US
dc.format.extent2727242 bytesen_US
dc.identifier(Sirsi) a2053352en_US
dc.identifier.urihttp://hdl.handle.net/1993/21566
dc.language.isoengen_US
dc.rightsopen accessen_US
dc.titleSmall signal model of an HVDC terminal for stability analysis of AC-DC power systemsen_US
dc.typemaster thesisen_US
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