Reduced-order modeling of the parallel hybrid modular multilevel converter
| dc.contributor.author | Shumski, Curtis | |
| dc.contributor.examiningcommittee | Kordi, Behzad (Electrical and Computer Engineering) Rajapakse, Athula (Electrical and Computer Engineering) | en_US |
| dc.contributor.supervisor | Filizadeh, Shaahin (Electrical and Computer Engineering) | en_US |
| dc.date.accessioned | 2020-08-27T19:21:35Z | |
| dc.date.available | 2020-08-27T19:21:35Z | |
| dc.date.copyright | 2020-08-27 | |
| dc.date.issued | 2020 | en_US |
| dc.date.submitted | 2020-08-27T14:05:47Z | en_US |
| dc.degree.discipline | Electrical and Computer Engineering | en_US |
| dc.degree.level | Master of Science (M.Sc.) | en_US |
| dc.description.abstract | As the demand for electrical power continues to increase, so does the attractiveness of high voltage direct current (HVDC) transmission networks to transfer power from generating stations to load centers. Located at either end of the HVDC transmission network are converter stations that convert the AC power into DC power, and vice versa. A voltage source converter (VSC) commonly used in practice is the modular multilevel converter (MMC); however, these converters require many power electronic switches that will significantly increase the cost of such HVDC networks. A cost-effective alternative to these converters is the parallel hybrid MMC (PH-MMC), which is the focus of this thesis. Modeling VSCs in large electrical networks can be a computational burden as a small time step is required to capture all of the switching transients of the VSC. In some situations, it may not be necessary to simulate every switching instant, and instead a reduced-order model can be utilized. The reduced order model of VSCs retain the behavior of the converters, while being able to run at a larger time step and at a much faster simulation runtime. The basic principles of MMCs are first derived and the topological changes of the PH-MMC are analyzed. Comparisons between the PH-MMC and conventional MMCs are drawn to showcase the advantages and disadvantages of the PH-MMC. Control algorithms are described for basic operation of the PH-MMC, and control block diagrams are detailed to control the sub-module capacitor voltages as well as the AC terminal outputs. A qualitative fault analysis is provided for both AC and DC side faults, and a reduced-order model is developed to accurately model the PH-MMC in electromagnetic transient (EMT) studies by removing the need to model high frequency switching instants. Using a simple network model and a more complex network model, dynamic simulations are performed in PSCADTM/EMTDCTM software to validate the reduced-order model against the full, detailed switching model. Simulation results show that the developed reduced-order model is an accurate representation of the PH-MMC, while significantly decreasing the runtime to carry out such simulations as compared to the detailed model. When incorporating PH-MMCs into larger networks, the reduced-order model developed in this thesis can be used to alleviate the computational burden of using a small time step while maintaining the low frequency behavior of the converter. | en_US |
| dc.description.note | October 2020 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1993/34898 | |
| dc.language.iso | eng | en_US |
| dc.rights | open access | en_US |
| dc.subject | Voltage source converter | en_US |
| dc.subject | Parallel hybrid modular multilevel converter | en_US |
| dc.subject | Multilevel converter | en_US |
| dc.subject | Reduced-order modeling | en_US |
| dc.subject | AC and DC fault ride-through capabilities | en_US |
| dc.subject | HVDC transmission | en_US |
| dc.title | Reduced-order modeling of the parallel hybrid modular multilevel converter | en_US |
| dc.type | master thesis | en_US |