Fault modelling and simulation and built-in self-test methods for CMOS circuits

dc.contributor.authorNesbitt, Robert J.en_US
dc.date.accessioned2013-02-25T17:08:36Z
dc.date.available2013-02-25T17:08:36Z
dc.date.issued1988en_US
dc.degree.disciplineElectrical Engineeringen_US
dc.degree.levelMaster of Science (M.Sc.)en_US
dc.description.abstracten_US
dc.format.extentix, 130 leaves :en_US
dc.identifierocm72730259en_US
dc.identifier.urihttp://hdl.handle.net/1993/16777
dc.language.isoengen_US
dc.rightsopen accessen_US
dc.titleFault modelling and simulation and built-in self-test methods for CMOS circuitsen_US
dc.typemaster thesisen_US
Files
Original bundle
Now showing 1 - 1 of 1
Loading...
Thumbnail Image
Name:
Nesbitt_Fault_Modelling.pdf
Size:
6.4 MB
Format:
Adobe Portable Document Format
Description: