Design and use of AUTONET, a logic-level neural simulator

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dc.contributor.authorEllis, R. E.en_US
dc.date.accessioned2013-01-18T20:44:34Z
dc.date.available2013-01-18T20:44:34Z
dc.date.issued1982en_US
dc.degree.disciplineComputer Scienceen_US
dc.degree.levelMaster of Science (M.Sc.)en_US
dc.description.abstracten_US
dc.format.extentvi, 105 leaves :en_US
dc.identifierocm72767058en_US
dc.identifier.urihttp://hdl.handle.net/1993/15039
dc.language.isoengen_US
dc.rightsopen accessen_US
dc.titleDesign and use of AUTONET, a logic-level neural simulatoren_US
dc.typemaster thesisen_US
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