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dc.contributor.supervisor Filizadeh,Shaahin (Electrical and Computer Engineering) en_US
dc.contributor.author Moustafa, Mohamed
dc.date.accessioned 2012-01-06T23:29:25Z
dc.date.available 2012-01-06T23:29:25Z
dc.date.issued 2012-01-06
dc.identifier.uri http://hdl.handle.net/1993/5040
dc.description.abstract This thesis deals with modeling, simulation and operating limits of high-voltage direct-current (HVDC) transmission systems that employ voltage-source converters (VSCs) as their building blocks. This scheme is commonly known as the VSC-HVDC transmission. A simulation-based study is undertaken in which detailed electromagnetic transient (EMT) models are developed for a back-to-back VSC-HVDC transmission system. Different control strategies are implemented and their dynamic performances are investigated in the PSCAD/EMTDC EMT simulator. The research presented in this thesis firstly specifies the factors that limit the operating points of a VSC-HVDC system with particular emphasis on the strength of the terminating ac system. Although the EMT model shows these limits it provides little analytical reason for their presence and extent. A phasor-based quasi-steady state model of the system including the phase-locked loop firing control mechanism is proposed to determine and characterize the factors contributing to these operating limits. Stability margins and limits on the maximum available power are calculated, taking into consideration the maximum voltage rating of the VSC. The variations of ac system short-circuit ratio (SCR) and transformer impedance are proven to significantly impact the operating limits of the VSC-HVDC system. The results show how the power transfer capability reduces as the SCR decreases. The analysis shows that VSC-HVDC converters can operate into much weaker networks, and with less sensitivity, than the conventional line commutated converters (LCC-HVDC). Also for a given SCR the VSC-HVDC system has a significantly larger maximum available power in comparison with LCC-HVDC. A second research thrust of the thesis is introduction of a simplified converter model to reduce the computational intensity of its simulation. This is associated with the admittance matrix inversions required to simulate high-frequency switching of the converter valves. This simplified model is based on the concept of dynamic average-value modelling and provides the ability to generate either the full spectrum or the fundamental-frequency component of the VSC voltage. The model is validated against the detailed VSC-HVDC circuit and shows accurate matching during steady state and transient operation. Major reductions of 50-70% in CPU-time in repetitive simulation studies such as multiple runs and optimization-based controller tuning are achieved. en_US
dc.rights info:eu-repo/semantics/openAccess
dc.subject VSC-HVDC en_US
dc.subject Operating limits en_US
dc.subject Dynamic average-value modelling en_US
dc.title Operating limits and dynamic average-value modelling of VSC-HVDC systems en_US
dc.type info:eu-repo/semantics/doctoralThesis
dc.degree.discipline Electrical and Computer Engineering en_US
dc.contributor.examiningcommittee Gole,Aniruddha (Electrical and Computer Engineering) Soliman,Hassan (Mechanical and Manufacturing Engineering) Sood,Vijay(University of Ontario Institute of Technology) en_US
dc.degree.level Doctor of Philosophy (Ph.D.) en_US
dc.description.note February 2012 en_US


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