//////////////////////////////////////////////////////////////////////////////
// Filename:          C:\School\Project\MPSoC\Multiprocs/drivers/task_controller_if_v1_00_a/src/task_controller_if.h
// Version:           1.00.a
// Description:       task_controller_if Driver Header File
// Date:              Sat Apr 18 16:21:40 2009 (by Create and Import Peripheral Wizard)
//////////////////////////////////////////////////////////////////////////////

#ifndef TASK_CONTROLLER_IF_H
#define TASK_CONTROLLER_IF_H

/***************************** Include Files *******************************/

#include "xbasic_types.h"
#include "xstatus.h"
#include "xio.h"

/************************** Constant Definitions ***************************/


/**
 * User Logic Slave Space Offsets
 * -- SLAVE_REG0 : user logic slave module register 0
 * -- SLAVE_REG1 : user logic slave module register 1
 * -- SLAVE_REG2 : user logic slave module register 2
 */
#define TASK_CONTROLLER_IF_USER_SLAVE_SPACE_OFFSET (0x00000000)
#define TASK_CONTROLLER_IF_SLAVE_REG0_OFFSET (TASK_CONTROLLER_IF_USER_SLAVE_SPACE_OFFSET + 0x00000000)
#define TASK_CONTROLLER_IF_SLAVE_REG1_OFFSET (TASK_CONTROLLER_IF_USER_SLAVE_SPACE_OFFSET + 0x00000002)
#define TASK_CONTROLLER_IF_SLAVE_REG2_OFFSET (TASK_CONTROLLER_IF_USER_SLAVE_SPACE_OFFSET + 0x00000004)

/**
 * IPIF Reset/Mir Space Register Offsets
 * -- RST : software reset register
 * -- MIR : module identification register
 */
#define TASK_CONTROLLER_IF_IPIF_RST_SPACE_OFFSET (0x00000100)
#define TASK_CONTROLLER_IF_RST_OFFSET (TASK_CONTROLLER_IF_IPIF_RST_SPACE_OFFSET + 0x00000000)
#define TASK_CONTROLLER_IF_MIR_OFFSET (TASK_CONTROLLER_IF_IPIF_RST_SPACE_OFFSET + 0x00000000)

/**
 * IPIF Reset/Mir Masks
 * -- IPIF_MAVN_MASK   : module major version number
 * -- IPIF_MIVN_MASK   : module minor version number
 * -- IPIF_MIVL_MASK   : module minor version letter
 * -- IPIF_BID_MASK    : module block id
 * -- IPIF_BTP_MASK    : module block type
 * -- IPIF_RESET       : software reset
 */
#define IPIF_MAVN_MASK (0xF0000000UL)
#define IPIF_MIVN_MASK (0x0FE00000UL)
#define IPIF_MIVL_MASK (0x001F0000UL)
#define IPIF_BID_MASK (0x0000FF00UL)
#define IPIF_BTP_MASK (0x000000FFUL)
#define IPIF_RESET (0x0000000A)

#define TASKS_DONE_FLAG 0xFFFF

/**************************** Type Definitions *****************************/


/***************** Macros (Inline Functions) Definitions *******************/

/**
 *
 * Write a value to a TASK_CONTROLLER_IF register. A 32 bit write is performed.
 * If the component is implemented in a smaller width, only the least
 * significant data is written.
 *
 * @param   BaseAddress is the base address of the TASK_CONTROLLER_IF device.
 * @param   RegOffset is the register offset from the base to write to.
 * @param   Data is the data written to the register.
 *
 * @return  None.
 *
 * @note
 * C-style signature:
 * 	void TASK_CONTROLLER_IF_mWriteReg(Xuint32 BaseAddress, unsigned RegOffset, Xuint32 Data)
 *
 */
#define TASK_CONTROLLER_IF_mWriteReg(BaseAddress, RegOffset, Data) \
 	XIo_Out32((BaseAddress) + (RegOffset), (Xuint32)(Data))

/**
 *
 * Read a value from a TASK_CONTROLLER_IF register. A 32 bit read is performed.
 * If the component is implemented in a smaller width, only the least
 * significant data is read from the register. The most significant data
 * will be read as 0.
 *
 * @param   BaseAddress is the base address of the TASK_CONTROLLER_IF device.
 * @param   RegOffset is the register offset from the base to write to.
 *
 * @return  Data is the data from the register.
 *
 * @note
 * C-style signature:
 * 	Xuint32 TASK_CONTROLLER_IF_mReadReg(Xuint32 BaseAddress, unsigned RegOffset)
 *
 */
#define TASK_CONTROLLER_IF_mReadReg(BaseAddress, RegOffset) \
 	XIo_In32((BaseAddress) + (RegOffset))


/**
 *
 * Write/Read value to/from TASK_CONTROLLER_IF user logic slave registers.
 *
 * @param   BaseAddress is the base address of the TASK_CONTROLLER_IF device.
 * @param   Value is the data written to the register.
 *
 * @return  Data is the data from the user logic slave register.
 *
 * @note
 * C-style signature:
 * 	Xuint16 TASK_CONTROLLER_IF_mReadSlaveRegn(Xuint32 BaseAddress)
 *
 */
#define TASK_CONTROLLER_IF_mWriteSlaveReg0(BaseAddress, Value) \
 	XIo_Out16((BaseAddress) + (TASK_CONTROLLER_IF_SLAVE_REG0_OFFSET), (Xuint16)(Value))
#define TASK_CONTROLLER_IF_mWriteSlaveReg1(BaseAddress, Value) \
 	XIo_Out16((BaseAddress) + (TASK_CONTROLLER_IF_SLAVE_REG1_OFFSET), (Xuint16)(Value))
#define TASK_CONTROLLER_IF_mWriteSlaveReg2(BaseAddress, Value) \
 	XIo_Out16((BaseAddress) + (TASK_CONTROLLER_IF_SLAVE_REG2_OFFSET), (Xuint16)(Value))

#define TASK_CONTROLLER_IF_mReadSlaveReg0(BaseAddress) \
 	XIo_In16((BaseAddress) + (TASK_CONTROLLER_IF_SLAVE_REG0_OFFSET))
#define TASK_CONTROLLER_IF_mReadSlaveReg1(BaseAddress) \
 	XIo_In16((BaseAddress) + (TASK_CONTROLLER_IF_SLAVE_REG1_OFFSET))
#define TASK_CONTROLLER_IF_mReadSlaveReg2(BaseAddress) \
 	XIo_In16((BaseAddress) + (TASK_CONTROLLER_IF_SLAVE_REG2_OFFSET))

/**
 *
 * Reset TASK_CONTROLLER_IF via software.
 *
 * @param   BaseAddress is the base address of the TASK_CONTROLLER_IF device.
 *
 * @return  None.
 *
 * @note
 * C-style signature:
 * 	void TASK_CONTROLLER_IF_mReset(Xuint32 BaseAddress)
 *
 */
#define TASK_CONTROLLER_IF_mReset(BaseAddress) \
 	XIo_Out32((BaseAddress)+(TASK_CONTROLLER_IF_RST_OFFSET), IPIF_RESET)

/**
 *
 * Read module identification information from TASK_CONTROLLER_IF device.
 *
 * @param   BaseAddress is the base address of the TASK_CONTROLLER_IF device.
 *
 * @return  None.
 *
 * @note
 * C-style signature:
 * 	Xuint32 TASK_CONTROLLER_IF_mReadMIR(Xuint32 BaseAddress)
 *
 */
#define TASK_CONTROLLER_IF_mReadMIR(BaseAddress) \
 	XIo_In32((BaseAddress)+(TASK_CONTROLLER_IF_MIR_OFFSET))

/************************** Function Prototypes ****************************/


/**
 *
 * Run a self-test on the driver/device. Note this may be a destructive test if
 * resets of the device are performed.
 *
 * If the hardware system is not built correctly, this function may never
 * return to the caller.
 *
 * @param   baseaddr_p is the base address of the TASK_CONTROLLER_IF instance to be worked on.
 *
 * @return
 *
 *    - XST_SUCCESS   if all self-test code passed
 *    - XST_FAILURE   if any self-test code failed
 *
 * @note    Caching must be turned off for this function to work.
 * @note    Self test may fail if data memory and device are not on the same bus.
 *
 */
XStatus TASK_CONTROLLER_IF_SelfTest(void * baseaddr_p);
Xuint16 wait_for_next_task(Xuint32 baseaddr);
void set_executing_flag(Xuint32 baseaddr, Xuint8 execute);
void set_start_task_control_flag(Xuint32 baseaddr, Xuint8 start_task_control);
Xuint16 get_current_iteration(Xuint32 baseaddr);
Xuint8 all_tasks_done(Xuint32 baseaddr);
void init_task_controller(Xuint32 baseaddr);

#endif // TASK_CONTROLLER_IF_H
