--------------------------------------------------------------------------------
-- Copyright (c) 1995-2003 Xilinx, Inc.
-- All Right Reserved.
--------------------------------------------------------------------------------
--   ____  ____ 
--  /   /\/   / 
-- /___/  \  /    Vendor: Xilinx 
-- \   \   \/     Version : 9.1i
--  \   \         Application : ISE
--  /   /         Filename : MPSoC_top_tb_selfcheck.vhw
-- /___/   /\     Timestamp : Thu Apr 02 16:00:32 2009
-- \   \  /  \ 
--  \___\/\___\ 
--
--Command: 
--Design Name: MPSoC_top_tb_selfcheck_beh
--Device: Xilinx
--

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_TEXTIO.ALL;
USE STD.TEXTIO.ALL;

ENTITY MPSoC_top_tb_selfcheck_beh IS
END MPSoC_top_tb_selfcheck_beh;

ARCHITECTURE testbench_arch OF MPSoC_top_tb_selfcheck_beh IS
    COMPONENT MPSoC_top
        PORT (
            mem_clk : In std_logic;
            proc_clk : In std_logic;
            reset : In std_logic;
            Bus2IP_Data : In std_logic_vector (0 To 31);
            Bus2IP_BE : In std_logic_vector (0 To 3);
            Bus2IP_RdCE : In std_logic_vector (0 To 5);
            Bus2IP_WrCE : In std_logic_vector (0 To 5);
            IP2Bus_Data : Out std_logic_vector (0 To 31);
            IP2Bus_Ack : Out std_logic_vector (0 To 1);
            IP2Bus_Retry : Out std_logic_vector (0 To 1);
            IP2Bus_Error : Out std_logic_vector (0 To 1);
            IP2Bus_ToutSup : Out std_logic_vector (0 To 1)
        );
    END COMPONENT;

    SIGNAL mem_clk : std_logic := '0';
    SIGNAL proc_clk : std_logic := '0';
    SIGNAL reset : std_logic := '1';
    SIGNAL Bus2IP_Data : std_logic_vector (0 To 31) := "00000000000000000000000000000000";
    SIGNAL Bus2IP_BE : std_logic_vector (0 To 3) := "1111";
    SIGNAL Bus2IP_RdCE : std_logic_vector (0 To 5) := "000000";
    SIGNAL Bus2IP_WrCE : std_logic_vector (0 To 5) := "000000";
    SIGNAL IP2Bus_Data : std_logic_vector (0 To 31) := "00000000000000000000000000000000";
    SIGNAL IP2Bus_Ack : std_logic_vector (0 To 1) := "00";
    SIGNAL IP2Bus_Retry : std_logic_vector (0 To 1) := "00";
    SIGNAL IP2Bus_Error : std_logic_vector (0 To 1) := "00";
    SIGNAL IP2Bus_ToutSup : std_logic_vector (0 To 1) := "00";

    SHARED VARIABLE TX_ERROR : INTEGER := 0;
    SHARED VARIABLE TX_OUT : LINE;

    constant PERIOD_mem_clk : time := 200 ns;
    constant DUTY_CYCLE_mem_clk : real := 0.5;
    constant OFFSET_mem_clk : time := 0 ns;
    constant PERIOD_proc_clk : time := 100 ns;
    constant DUTY_CYCLE_proc_clk : real := 0.5;
    constant OFFSET_proc_clk : time := 0 ns;

    BEGIN
        UUT : MPSoC_top
        PORT MAP (
            mem_clk => mem_clk,
            proc_clk => proc_clk,
            reset => reset,
            Bus2IP_Data => Bus2IP_Data,
            Bus2IP_BE => Bus2IP_BE,
            Bus2IP_RdCE => Bus2IP_RdCE,
            Bus2IP_WrCE => Bus2IP_WrCE,
            IP2Bus_Data => IP2Bus_Data,
            IP2Bus_Ack => IP2Bus_Ack,
            IP2Bus_Retry => IP2Bus_Retry,
            IP2Bus_Error => IP2Bus_Error,
            IP2Bus_ToutSup => IP2Bus_ToutSup
        );

        PROCESS    -- clock process for mem_clk
        BEGIN
            WAIT for OFFSET_mem_clk;
            CLOCK_LOOP : LOOP
                mem_clk <= '0';
                WAIT FOR (PERIOD_mem_clk - (PERIOD_mem_clk * DUTY_CYCLE_mem_clk));
                mem_clk <= '1';
                WAIT FOR (PERIOD_mem_clk * DUTY_CYCLE_mem_clk);
            END LOOP CLOCK_LOOP;
        END PROCESS;

        PROCESS    -- clock process for proc_clk
        BEGIN
            WAIT for OFFSET_proc_clk;
            CLOCK_LOOP : LOOP
                proc_clk <= '0';
                WAIT FOR (PERIOD_proc_clk - (PERIOD_proc_clk * DUTY_CYCLE_proc_clk));
                proc_clk <= '1';
                WAIT FOR (PERIOD_proc_clk * DUTY_CYCLE_proc_clk);
            END LOOP CLOCK_LOOP;
        END PROCESS;

        PROCESS    -- Process for proc_clk
            PROCEDURE CHECK_IP2Bus_Ack(
                next_IP2Bus_Ack : std_logic_vector (0 To 1);
                TX_TIME : INTEGER
            ) IS
                VARIABLE TX_STR : String(1 to 4096);
                VARIABLE TX_LOC : LINE;
                BEGIN
                IF (IP2Bus_Ack /= next_IP2Bus_Ack) THEN
                    STD.TEXTIO.write(TX_LOC, string'("Error at time="));
                    STD.TEXTIO.write(TX_LOC, TX_TIME);
                    STD.TEXTIO.write(TX_LOC, string'("ns IP2Bus_Ack="));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, IP2Bus_Ack);
                    STD.TEXTIO.write(TX_LOC, string'(", Expected = "));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, next_IP2Bus_Ack);
                    STD.TEXTIO.write(TX_LOC, string'(" "));
                    TX_STR(TX_LOC.all'range) := TX_LOC.all;
                    STD.TEXTIO.Deallocate(TX_LOC);
                    ASSERT (FALSE) REPORT TX_STR SEVERITY ERROR;
                    TX_ERROR := TX_ERROR + 1;
                END IF;
            END;
            PROCEDURE CHECK_IP2Bus_Data(
                next_IP2Bus_Data : std_logic_vector (0 To 31);
                TX_TIME : INTEGER
            ) IS
                VARIABLE TX_STR : String(1 to 4096);
                VARIABLE TX_LOC : LINE;
                BEGIN
                IF (IP2Bus_Data /= next_IP2Bus_Data) THEN
                    STD.TEXTIO.write(TX_LOC, string'("Error at time="));
                    STD.TEXTIO.write(TX_LOC, TX_TIME);
                    STD.TEXTIO.write(TX_LOC, string'("ns IP2Bus_Data="));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, IP2Bus_Data);
                    STD.TEXTIO.write(TX_LOC, string'(", Expected = "));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, next_IP2Bus_Data);
                    STD.TEXTIO.write(TX_LOC, string'(" "));
                    TX_STR(TX_LOC.all'range) := TX_LOC.all;
                    STD.TEXTIO.Deallocate(TX_LOC);
                    ASSERT (FALSE) REPORT TX_STR SEVERITY ERROR;
                    TX_ERROR := TX_ERROR + 1;
                END IF;
            END;
            PROCEDURE CHECK_IP2Bus_Error(
                next_IP2Bus_Error : std_logic_vector (0 To 1);
                TX_TIME : INTEGER
            ) IS
                VARIABLE TX_STR : String(1 to 4096);
                VARIABLE TX_LOC : LINE;
                BEGIN
                IF (IP2Bus_Error /= next_IP2Bus_Error) THEN
                    STD.TEXTIO.write(TX_LOC, string'("Error at time="));
                    STD.TEXTIO.write(TX_LOC, TX_TIME);
                    STD.TEXTIO.write(TX_LOC, string'("ns IP2Bus_Error="));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, IP2Bus_Error);
                    STD.TEXTIO.write(TX_LOC, string'(", Expected = "));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, next_IP2Bus_Error);
                    STD.TEXTIO.write(TX_LOC, string'(" "));
                    TX_STR(TX_LOC.all'range) := TX_LOC.all;
                    STD.TEXTIO.Deallocate(TX_LOC);
                    ASSERT (FALSE) REPORT TX_STR SEVERITY ERROR;
                    TX_ERROR := TX_ERROR + 1;
                END IF;
            END;
            PROCEDURE CHECK_IP2Bus_Retry(
                next_IP2Bus_Retry : std_logic_vector (0 To 1);
                TX_TIME : INTEGER
            ) IS
                VARIABLE TX_STR : String(1 to 4096);
                VARIABLE TX_LOC : LINE;
                BEGIN
                IF (IP2Bus_Retry /= next_IP2Bus_Retry) THEN
                    STD.TEXTIO.write(TX_LOC, string'("Error at time="));
                    STD.TEXTIO.write(TX_LOC, TX_TIME);
                    STD.TEXTIO.write(TX_LOC, string'("ns IP2Bus_Retry="));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, IP2Bus_Retry);
                    STD.TEXTIO.write(TX_LOC, string'(", Expected = "));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, next_IP2Bus_Retry);
                    STD.TEXTIO.write(TX_LOC, string'(" "));
                    TX_STR(TX_LOC.all'range) := TX_LOC.all;
                    STD.TEXTIO.Deallocate(TX_LOC);
                    ASSERT (FALSE) REPORT TX_STR SEVERITY ERROR;
                    TX_ERROR := TX_ERROR + 1;
                END IF;
            END;
            PROCEDURE CHECK_IP2Bus_ToutSup(
                next_IP2Bus_ToutSup : std_logic_vector (0 To 1);
                TX_TIME : INTEGER
            ) IS
                VARIABLE TX_STR : String(1 to 4096);
                VARIABLE TX_LOC : LINE;
                BEGIN
                IF (IP2Bus_ToutSup /= next_IP2Bus_ToutSup) THEN
                    STD.TEXTIO.write(TX_LOC, string'("Error at time="));
                    STD.TEXTIO.write(TX_LOC, TX_TIME);
                    STD.TEXTIO.write(TX_LOC, string'("ns IP2Bus_ToutSup="));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, IP2Bus_ToutSup);
                    STD.TEXTIO.write(TX_LOC, string'(", Expected = "));
                    IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, next_IP2Bus_ToutSup);
                    STD.TEXTIO.write(TX_LOC, string'(" "));
                    TX_STR(TX_LOC.all'range) := TX_LOC.all;
                    STD.TEXTIO.Deallocate(TX_LOC);
                    ASSERT (FALSE) REPORT TX_STR SEVERITY ERROR;
                    TX_ERROR := TX_ERROR + 1;
                END IF;
            END;
            BEGIN
                -- -------------  Current Time:  135ns
                WAIT FOR 135 ns;
                reset <= '0';
                Bus2IP_Data <= "10100101101001010010001100100011";
                Bus2IP_WrCE <= "100100";
                -- -------------------------------------
                -- -------------  Current Time:  165ns
                WAIT FOR 30 ns;
                CHECK_IP2Bus_Ack("11", 165);
                -- -------------------------------------
                -- -------------  Current Time:  235ns
                WAIT FOR 70 ns;
                Bus2IP_Data <= "00011111111111110000000011111111";
                Bus2IP_WrCE <= "010010";
                -- -------------------------------------
                -- -------------  Current Time:  335ns
                WAIT FOR 100 ns;
                Bus2IP_Data <= "11000000000000001100000000000000";
                Bus2IP_WrCE <= "001001";
                -- -------------------------------------
                -- -------------  Current Time:  435ns
                WAIT FOR 100 ns;
                Bus2IP_RdCE <= "001001";
                Bus2IP_WrCE <= "000000";
                -- -------------------------------------
                -- -------------  Current Time:  465ns
                WAIT FOR 30 ns;
                CHECK_IP2Bus_Data("11000000000000001100000000000000", 465);
                -- -------------------------------------
                -- -------------  Current Time:  965ns
                WAIT FOR 500 ns;
                CHECK_IP2Bus_Data("11000000000000001110000000000000", 965);
                -- -------------------------------------
                WAIT FOR 1235 ns;

                IF (TX_ERROR = 0) THEN
                    STD.TEXTIO.write(TX_OUT, string'("No errors or warnings"));
                    ASSERT (FALSE) REPORT
                      "Simulation successful (not a failure).  No problems detected."
                      SEVERITY FAILURE;
                ELSE
                    STD.TEXTIO.write(TX_OUT, TX_ERROR);
                    STD.TEXTIO.write(TX_OUT,
                        string'(" errors found in simulation"));
                    ASSERT (FALSE) REPORT "Errors found during simulation"
                         SEVERITY FAILURE;
                END IF;
            END PROCESS;

    END testbench_arch;

